DocumentCode :
3172589
Title :
Critical voltage transition logic: an ultrafast CMOS logic family
Author :
Zhu, Zheng ; Carlson, Bradley S.
Author_Institution :
Dept. of Electr. Eng., State Univ. of New York, Stony Brook, NY, USA
fYear :
1997
fDate :
12-15 Oct 1997
Firstpage :
732
Lastpage :
737
Abstract :
The authors present a new kind of CMOS logic circuit that has a different structure and different operation mechanism compared to the existing logic circuits. Its unique delay propagation characteristic makes it much faster than the conventional CMOS logic gate. Gate outputs are preconditioned to a voltage level between Vdd and Vss using a new clocking scheme and circuit design. They give a buffer design example which is about 6.5 times faster than the conventional buffer. The total energy consumed by the new circuit structure is slightly more than conventional CMOS domino logic; however the energy-delay product is smaller
Keywords :
CMOS logic circuits; buffer circuits; delays; integrated circuit design; logic design; CMOS logic circuit; buffer design; circuit design; clocking scheme; critical voltage transition logic; delay propagation characteristic; energy-delay product; operation mechanism; preconditioned gate outputs; total energy consumption; ultrafast CMOS logic family; voltage level; CMOS logic circuits; CMOS technology; Circuit synthesis; Clocks; Inverters; Logic circuits; Logic gates; Propagation delay; Switches; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1997. ICCD '97. Proceedings., 1997 IEEE International Conference on
Conference_Location :
Austin, TX
ISSN :
1063-6404
Print_ISBN :
0-8186-8206-X
Type :
conf
DOI :
10.1109/ICCD.1997.628946
Filename :
628946
Link To Document :
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