Title :
Low-temperature operation of silicon bipolar ECL circuits
Author :
Cressler, J.D. ; Tang, D.D. ; Jenkins, K.A. ; Li, G.-P.
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Abstract :
Silicon bipolar transistors with current gain as high as 80 at 77 K are described. ECL (emitter-coupled-logic) circuits using these transistors are operational at low temperatures with no degradation in circuit speed observed until about 165 K as compared to its speed at a typical system operating temperature of 358 K (85 degrees C). The key design and performance issues for low-temperature operation of bipolar (or BiCMOS) circuits are addressed. The device used in the investigation is a scaled double-poly self-aligned transistor. Transistor small-signal response measured by standard S-parameter techniques as a function of temperature is shown. The static noise margin improves at low temperatures, suggesting that reduction of circuit logic swings will be possible. State gain can be greater than unity with V/sub L/ less than 200 mV at 85 K provided the pull-up resistance to emitter resistance ratio is kept sufficiently large.<>
Keywords :
bipolar integrated circuits; elemental semiconductors; emitter-coupled logic; integrated logic circuits; silicon; 77 to 165 K; S-parameter techniques; Si; bipolar ECL circuits; circuit speed; current gain; design issues; emitter resistance; emitter-coupled-logic; low-temperature operation; performance issues; pull-up resistance; reduction of circuit logic swings; scaled double-poly self-aligned transistor; small-signal response; static noise margin; BiCMOS integrated circuits; Bipolar transistor circuits; Bipolar transistors; Circuit noise; Degradation; Measurement standards; Noise reduction; Scattering parameters; Silicon; Temperature;
Conference_Titel :
Solid-State Circuits Conference, 1989. Digest of Technical Papers. 36th ISSCC., 1989 IEEE International
Conference_Location :
New York, NY, USA
DOI :
10.1109/ISSCC.1989.48266