DocumentCode :
3173045
Title :
Impact of gate resistance on RF performance of fully depleted SOI MOSFET
Author :
Chen, C.L. ; Wyatt, P.W. ; Chen, C.K. ; Knecht, J.M. ; Yost, D.-R.
Author_Institution :
Lincoln Lab., Massachusetts Inst. of Technol., Lexington, MA
fYear :
2006
fDate :
18-20 Jan. 2006
Abstract :
We demonstrate that a metal T-gate can significantly lower the gate resistance and improve the RF performance in fully depleted SOI (FDSOI) MOSFETs. FETs with various combinations of number of gate fingers and finger width are compared, and the results show that T-gate provides increased layout flexibility. The effects of the gate resistance on the RF performance are studied and a simplified distributed-gate model is presented to improve the accuracy of the BSIM model for RF circuit simulations
Keywords :
MOSFET; microwave transistors; semiconductor device models; silicon-on-insulator; BSIM model; fully depleted SOI MOSFET; gate resistance; microwave MOSFET; CMOS technology; Circuit simulation; FETs; Fabrication; Fingers; MOS capacitors; MOSFET circuits; Radio frequency; Semiconductor device modeling; Silicon on insulator technology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Silicon Monolithic Integrated Circuits in RF Systems, 2006. Digest of Papers. 2006 Topical Meeting on
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-9472-0
Type :
conf
DOI :
10.1109/SMIC.2005.1587982
Filename :
1587982
Link To Document :
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