A 2 Gbit/s 0.18 /spl mu/m CMOS front-end amplifier for integrated differential photodiodes

A front-end amplifier for use with an integrated differential spatially modulated CMOS photodiode using unmodified 0.18 mum technology is presented. The circuit comprises a low-noise transimpedance amplifier (TIA) connected with a high-gain limiting amplifier (LIA) and a 50 Q driver. A combination of thick and thin oxide transistors is used to allow for 2.2 V photodiode bias for enhanced opto-electrical sensitivity and bandwidth. The two-stage TIA is designed for minimum integrated input referred noise current by careful dimensioning of the TIA input stage. The TIA-LIA overall transimpedance is 58 MQ (78 dBQ) and it supports data rates up to 2 Gbit/s. The integrated input referred noise current is 1 muA. The driver provides 125 mV single-ended voltage swing. The power consumption from the 3.3 V supply is 34 mW for the TIA-LIA-combination plus 17 mW for the 50 Omega driver. The optical sensitivity of the amplifier integrated with a CMOS photodiode at an incident wavelength of 850 nm for a bit error rate smaller than 10^-11 is -7 dBm at 2 Gbit/s and -10 dBm at 1.25 Gbit/s with a 2³¹-1 PRBS input signal