DocumentCode
3174336
Title
Flip chip assembly with sub-micron 3D re-alignment via solder surface tension
Author
Jae-Woong Nah ; Martin, Yves ; Kamlapurkar, Swetha ; Engelmann, Sebastian ; Bruce, Robert L. ; Barwicz, Tymon
Author_Institution
IBM T. J. Watson Res. Center, Yorktown Heights, NY, USA
fYear
2015
fDate
26-29 May 2015
Firstpage
35
Lastpage
40
Abstract
We demonstrate experimentally a flip-chip assembly with submicron three-dimensional alignment accuracy. We employ solder surface tension to push the flipped chip into lithographically defined alignment stops. During reflow, surface tension forces of the melted solder can move a chip by more than a hundred microns. We use these motions to obtain self-alignment by constraining the motions to lithographically defined mechanical stops and chip edge butting. This approach is particularly useful in InP laser to Si photonic assemblies, where sub-micron alignment is required for low optical connection loss. In this report, our test vehicles comprise silicon photonic chips and laser placeholder chips made of silicon as well. To enable self-alignment of edge-emitting single-mode lasers, a significant re-alignment range is needed to overcome the laser cleaving tolerance of +/- 15 microns and the low +/- 10 microns placement accuracy of high-throughput pick-and-place tools. We employ in-situ infrared (IR) microscopy to look through the assembled chips during solder induced re-alignment. We show that the self-alignment of the chips starts at the moment the solders melt. Cross sectional analysis is used to confirm the alignment accuracy and contact on the lithographic stops. We discuss process window considerations related to standoff height and solder volume.
Keywords
III-V semiconductors; flip-chip devices; lithography; microassembling; reflow soldering; silicon; solders; InP; Si; chip edge butting; cross sectional analysis; flip chip assembly; infrared microscopy; laser placeholder chips; lithographically defined alignment stops; photonic assemblies; photonic chips; reflow; solder surface tension; sub-micron 3D re-alignment; surface tension forces; Accuracy; Assembly; Flip-chip devices; Optical surface waves; Optical waveguides; Silicon; Substrates;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference (ECTC) , 2015 IEEE 65th
Conference_Location
San Diego, CA
Type
conf
DOI
10.1109/ECTC.2015.7159568
Filename
7159568
Link To Document