• DocumentCode
    3174363
  • Title

    Analog operation of junctionless transistors at cryogenic temperatures

  • Author

    Doria, R.T. ; Pavanello, M.A. ; Trevisoli, R.D. ; de Souza, M. ; Lee, C.-W. ; Ferain, I. ; Akhavan, N. Dehdashti ; Yan, R. ; Razavi, P. ; Yu, R. ; Kranti, A. ; Colinge, J.P.

  • Author_Institution
    LSI/PSI, Univ. of Sao Paulo, Sao Paulo, Brazil
  • fYear
    2010
  • fDate
    11-14 Oct. 2010
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    This work presented the analog behavior of nMOS Junctionless transistors in the temperature range of 100 K to 473 K investigated by experimental results and simulations. It has been shown that gm,max of JL present a parabolic-like dependence on temperature. On the other hand, the JL gm/IDS is nearly insensitive to temperature variations in the on state, which can be interesting for several analog circuit designs. A linear dependence of VEA and AV on T is obtained in the JL, in the contrary of IM transistors where a peak is obtained around 300 K. When evaluated in terms of gm/IDS, the AV of JL devices increases as gate voltage is reduced.
  • Keywords
    MOSFET; analogue circuits; cryogenics; analog behavior; analog circuit designs; analog operation; cryogenic temperatures; gate voltage; linear dependence; nMOS junctionless transistors; parabolic-like dependence; temperature 100 K to 473 K; temperature variations; Doping; Logic gates; Neodymium; Silicon; Temperature distribution; Temperature measurement; Transistors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOI Conference (SOI), 2010 IEEE International
  • Conference_Location
    San Diego, CA
  • ISSN
    1078-621x
  • Print_ISBN
    978-1-4244-9130-8
  • Electronic_ISBN
    1078-621x
  • Type

    conf

  • DOI
    10.1109/SOI.2010.5641393
  • Filename
    5641393