Improved C-V, I–V characteristics for co-polymerized organic liner in the Through-Silicon-Via for high frequency applications by post heat treatment

The effect of post-heat treatment of chemical-vapor-deposited polyimide (PI) liner along the Cu-TSV side-wall in the 3D-LSI chips was investigated for leakage current, parasitic capacitance and thermal stability by analyzing current-voltage (I-V), capacitance-voltage (C-V), and x-ray photo-electron spectroscopy (XPS) data. From the I-V data it is inferred that the post heat treatment of 250 nm-thick PI at 200 °C has tremendously suppressed the leak current as compared to the leak current in the pristine PI film. In the case of annealed PI the leak current was minimized to nearly half for the stress voltage of up to ±20 V, whereas it was reduced by nearly three (3) orders for the stress value of ±40 V. The post annealing process also suppresses the hysteresis, and this effect is pronounced for the thicker film.