Title :
An ISDN echo-cancelling transceiver chip for 2B1Q coded U-interface
Author :
Takahashi, Y. ; Takahara, M. ; Makabe, T. ; Inami, D. ; Ohno, M. ; Nakagawa, F. ; Koyama, T. ; Kanemasa, A. ; Chatani, M. ; Ikeda, Ryohei
Author_Institution :
NEC Corp., Kawasaski, Japan
Abstract :
A 5-V CMOS chip set used for an integrated services digital network (ISDN) U-interface transceiver is described which accomplishes 2B+D channel (144-kb/s) transmission using a 2B1Q line code based on echo cancellation over existing two-wire subscriber loops. The three-chip set consists of an analog front end (AFE), an echo canceler (ECD) and a receiver (RCV). The last two are digital signal processors. The AFE has been fabricated in double-polysilicon double-metal 1.6 mu m CMOS technology. The chip size is 7.5 mm*6.5 mm. The EC and RCV have been fabricated in double-metal 1.2- mu m CMOS technology using a standard-cell design. The chip sizes are 8.2 mm*8.2 mm and 8.5 mm*8.1 mm, respectively. Total power consumption of the chip set is 580 mW with a single 5-V supply.<>
Keywords :
CMOS integrated circuits; ISDN; echo suppression; standards; subscriber loops; transceivers; 1.2 micron; 1.6 micron; 144 kbit/s; 2B1Q coded U-interface; 580 mW; CMOS chip set; ISDN echo-cancelling transceiver chip; analog front end; double-polysilicon double metal ICs; echo canceler; power consumption; receiver; standard-cell design; two-wire subscriber loops; Adaptive filters; CMOS technology; Echo cancellers; Finite impulse response filter; IIR filters; ISDN; Low pass filters; Read only memory; Timing; Transceivers;
Conference_Titel :
Solid-State Circuits Conference, 1989. Digest of Technical Papers. 36th ISSCC., 1989 IEEE International
Conference_Location :
New York, NY, USA
DOI :
10.1109/ISSCC.1989.48280
