DocumentCode
3175554
Title
Formal Verification of C-element Circuits
Author
Yan, Chao ; Ouche, Florent ; Fesque, Laurent ; Morin-allory, Katell
Author_Institution
Dept. of Comput. Sci., Univ. of British Columbia, Vancouver, BC, Canada
fYear
2011
fDate
27-29 April 2011
Firstpage
55
Lastpage
64
Abstract
It is well known that the correct behavior of asynchronous circuits is not guaranteed when the inputs switch too slowly. The erroneous behavior is generally difficult to be spotted by simulation based methods. We applied formal methods to study the analog switching behavior of a full-buffer circuit composed of C-elements. We used our reach ability analysis tool COHO to compute all reachable states of two C-element designs and verified several analog properties. Based on these properties, we identified a sufficient condition under which the full-buffer circuit always supports the designed handshaking protocol. We also improved the COHO tool to automate the verification process, reduce error and improve performance.
Keywords
asynchronous circuits; formal verification; C-element circuits; COHO tool; analog switching behavior; asynchronous circuits; formal verification; full-buffer circuit; handshaking protocol; Automata; Capacitance; Computational modeling; Integrated circuit modeling; Mathematical model; Protocols; Transistors; Asynchronous Circuit; C-element; Formal Verification; Reachability Analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
Asynchronous Circuits and Systems (ASYNC), 2011 17th IEEE International Symposium on
Conference_Location
Ithaca, NY
ISSN
1522-8681
Print_ISBN
978-1-61284-973-7
Type
conf
DOI
10.1109/ASYNC.2011.14
Filename
5770569
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