DocumentCode :
3175701
Title :
Enabling packaging technology for emerging 56Gbps lane rate transceivers
Author :
Hong Shi ; Ramalingam, Suresh ; Shen Dong
Author_Institution :
Xilinx, Inc., San Jose, CA, USA
fYear :
2015
fDate :
26-29 May 2015
Firstpage :
518
Lastpage :
522
Abstract :
The demand to 400G/1TB data path requires ultrahigh speed transceiver operating at 56Gbps for low power and economical system implementation. As carrier frequency going into millimeter wave domain, IC package industry enters an unfamiliar world where many challenges become fundamental to the legacy technology. In this paper, we propose new 56Gbps package target for advanced substrate technology. Different organic substrate technologies are compared by physical design and modeling study for 56Gbps transceivers. Recent disruptive stacked 3D IC technology is also applied to overcome traditional TSV loss that impedes ultrahigh data transmission.
Keywords :
MIMIC; integrated circuit packaging; radio transceivers; three-dimensional integrated circuits; IC package; TSV loss; bit rate 56 Gbit/s; carrier frequency; lane rate transceiver; millimeter wave integrated circuit; packaging technology; ultrahigh data transmission; Dielectric losses; Insertion loss; Integrated circuits; Metals; Silicon; Substrates;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components and Technology Conference (ECTC) , 2015 IEEE 65th
Conference_Location :
San Diego, CA
Type :
conf
DOI :
10.1109/ECTC.2015.7159639
Filename :
7159639
Link To Document :
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