DocumentCode
3175985
Title
FC Cu pillar package development for broad market applications
Author
Cheng, Robert ; Wang, Mark ; Kuo, Roger Ho ; Chen, Elson ; Ic Chuang ; Pai, Benjamin ; Chang, Jenny ; Cheung, Calvin
Author_Institution
Adv. Semicond. Eng., Inc., Kaohsiung, Taiwan
fYear
2015
fDate
26-29 May 2015
Firstpage
609
Lastpage
614
Abstract
Over recent years, Flip Chip Technology has gained significant momentum as a major assembly technology for the semiconductor industry. And momentum is increasing as there is a strong need to expand flip chip applications to align with an evolving and dynamic market. As a result, our industry has seen many different configurations of FC packaging, and is constantly pushing boundaries and innovation to meet complex device requirements. This paper describes the development of a new generation of Flip Chip CSP (chip scale package) drawing from innovation from assembly and material techniques. While build up substrate has been very effective, laminate substrate with bond on trace design, together with Cu pillar solder tip assembly process design, has significant lower cost for FC CSP assembly.
Keywords
chip scale packaging; copper; flip-chip devices; Cu; assembly innovation; broad market applications; chip scale package; flip chip copper pillar package development; material techniques; Assembly; Chip scale packaging; Flip-chip devices; Lead; Reliability; Substrates; Vents;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference (ECTC) , 2015 IEEE 65th
Conference_Location
San Diego, CA
Type
conf
DOI
10.1109/ECTC.2015.7159654
Filename
7159654
Link To Document