DocumentCode :
3176007
Title :
A procedure for characterizing the BJT base resistance and Early voltages utilizing a dual base transistor test structure
Author :
Ingvarson, Fredrik ; Linder, Martin ; Jeppson, Kjell O. ; Zhang, Shi-Li ; Grahn, Jan V. ; Östling, Mikael
Author_Institution :
Dept. of Microelectron. ED, Chalmers Univ. of Technol., Goteborg, Sweden
fYear :
2001
fDate :
2001
Firstpage :
31
Lastpage :
36
Abstract :
The pinched-base extraction technique is investigated in detail. The separation of extrinsic and intrinsic base resistances utilizing the dependence of these resistances on transistor geometry is discussed. Uncertainties in extracted parameter values and deviations between nominal and real device geometry are shown to be two major problems associated with separation of the base resistance components. Also, the use of the extracted resistances in compact transistor modeling for circuit simulation is discussed. It is shown that the intrinsic base resistance obtained using the pinched-base technique does not necessarily translate directly into a compact model parameter. The dual base test structure used for resistance extraction is also used for extraction of the voltage dependent Early voltages. In contrast to previous methods which require the extrinsic base resistance, the method presented here does not require this parameter which, as shown here, can be difficult to extract. By using the new extraction method on transistors with different emitter widths, it was observed that the Early voltages decrease as the emitter width is increased and saturates at some value for very wide emitters. An explanation to the observed behavior, supported by device structure simulations, is also given
Keywords :
bipolar transistors; circuit simulation; electric resistance; semiconductor device models; semiconductor device testing; BJT Early voltage; BJT base resistance; Early voltage; base resistance component separation; circuit simulation; compact model parameter; compact transistor modeling; device geometry; device structure simulations; dual base test structure; dual base transistor test structure; emitter width; extracted parameter value uncertainties; extrinsic base resistance; intrinsic base resistance; pinched-base extraction technique; pinched-base technique; resistance; resistance extraction; transistor geometry; voltage dependent Early voltage; Circuit simulation; Data mining; Electrical resistance measurement; Geometry; Parameter extraction; Predictive models; Proximity effect; Testing; Transistors; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronic Test Structures, 2001. ICMTS 2001. Proceedings of the 2001 International Conference on
Conference_Location :
Kobe
Print_ISBN :
0-7803-6511-9
Type :
conf
DOI :
10.1109/ICMTS.2001.928633
Filename :
928633
Link To Document :
بازگشت