Title :
Test chips for evaluating strong phase shift lithography
Author :
Ashton, R.A. ; Kane, B.C. ; Blatchford, J.W. ; Shuttleworth, D.M.
Author_Institution :
Agere Syst., Orlando, FL, USA
Abstract :
Test structures are presented for the evaluation of phase shift lithography at the gate level of a CMOS technology. The structures address the measurement of phase shift printed line width, the evaluation of transistors as a function of phase shifter geometry and the detection of misalignment of contact windows to phase shift printed gates
Keywords :
CMOS integrated circuits; integrated circuit measurement; integrated circuit testing; phase shifting masks; photolithography; position measurement; size measurement; CMOS technology; contact windows; gate level phase shift lithography; measurement; misalignment detection; phase shift printed gates; phase shift printed line width; phase shifter geometry; strong phase shift lithography; test chips; test structures; transistor evaluation; CMOS technology; Costs; Integrated circuit technology; Integrated optics; Lighting; Lithography; Phase measurement; Printing; Resists; Testing;
Conference_Titel :
Microelectronic Test Structures, 2001. ICMTS 2001. Proceedings of the 2001 International Conference on
Conference_Location :
Kobe
Print_ISBN :
0-7803-6511-9
DOI :
10.1109/ICMTS.2001.928654
