Title :
Evaluation of the issues involved with test structures for the measurement of sheet resistance and linewidth of copper damascene interconnect
Author :
Smith, S. ; Walton, A.J. ; Ross, A.W.S. ; Bodammer, G.K.H. ; Stevenson, J.T.M.
Author_Institution :
Dept. of Electron. & Electr. Eng., Edinburgh Univ., UK
Abstract :
The effect of the barrier layer and dishing in copper interconnects causes extra difficulties in measuring sheet resistance and linewidth when compared with equivalent measurements on nondamascene processed tracks. This paper examines these issues and, for the first time, quantifies the effects of diffusion barrier layers and CMP dishing on the extraction of Rs from Greek cross type structures and the effect this has on linewidth measurement
Keywords :
chemical interdiffusion; chemical mechanical polishing; copper; diffusion barriers; electric resistance; integrated circuit interconnections; integrated circuit measurement; integrated circuit metallisation; size measurement; surface topography; CMP dishing; Cu; Greek cross type structures; barrier layer; copper damascene interconnect; copper interconnects; diffusion barrier layers; dishing; linewidth; linewidth measurement; nondamascene processed tracks; sheet resistance; sheet resistance measurement; test structures; Buildings; Conducting materials; Copper; Data mining; Electric resistance; Electric variables measurement; Electrical resistance measurement; Integrated circuit interconnections; Microelectronics; Testing;
Conference_Titel :
Microelectronic Test Structures, 2001. ICMTS 2001. Proceedings of the 2001 International Conference on
Conference_Location :
Kobe
Print_ISBN :
0-7803-6511-9
DOI :
10.1109/ICMTS.2001.928661
