Requirements for junction technology from device design

Requirements for the shallow junction technology in the sub-50 nm regime have been discussed. It was shown that suppression of transient enhanced diffusion (TED), dopant loss and dopant deactivation are key to achieving ultra shallow junctions with junction depth of less than 20 nm. To meet such requirements, new methods of atomic layer doping (ALD) and SiGe elevated source/drain for the formation of the ultra shallow junction have been proposed. In this paper, we focus the discussion on source/drain engineering to form an ultra shallow junction for sub-50 nm MOSFETs.