A provably good performance centric NoC topology

As chip density increases rapidly with every process generation, the use of Network-on-Chip (NoC) has become the prevalent architecture for SoC, MPSoC, and, large scale CMP (Chip Multi Processor) based designs. Diverse NoC solutions have been proposed by the researchers to meet the enhanced on-chip communication requirements. Here, underlying network interconnection architecture (topology), router design and routing policy play an important role for overall system performance improvement. In this work, a 2D Hybrid Mesh based Star topology has been proposed with an objective of providing low latency, low channel contention and higher throughput based system. The observe experimental results show a maximum latency benefit of 62% and increase of 48% in throughput for this proposed topology compared to simple 2D mesh in cost of additional area overhead.