Performance evalulation of different routing algorithms in Network on Chip

Network on Chip (NoC) is a new paradigm to make the interconnections inside a System on Chip (SoC). By the developments achieved in integrated circuits (IC) manufacturing there have been attempts to design vast amounts of network on the chips in order to achieve more efficient and optimized chips. A better routing algorithm can enhance the performance of NoC. XY routing algorithm is a distributed deterministic algorithm. Odd-Even (OE) routing algorithm is distributed adaptive routing algorithm with deadlock-free ability. Every NoC should satisfy some performance requirements like low latency, high throughput and low network power. Here we demonstrated the impact of traffic load variations on average latency, average throughput and total network power for two routing algorithms XY and OE on a 3×3 2-dimensional mesh topology. The simulations have been performed on NIRGAM NoC simulator version 2.1 for constant bit rate (CBR) traffic condition. The simulation results contains overall average latency (clock cycles per packet), average throughput (in Gbps) and total network power (in mW). Performance metrics (P) is calculated for both routing algorithms and compared.