Title :
FPGA based accelerated orientation calculation in SIFT using luts
Author :
Agrawal, Kunal ; Chowdhury, Shubhajit Roy
Author_Institution :
Centre for VLSI & Embedded Syst. Technol., IIIT-Hyderabad, Hyderabad, India
Abstract :
This paper presents a field programmable gate array (FPGA) based accelerated hardware architecture for Orientation Calculation in Scale Invariant Feature Transform (SIFT) for real time image registration. The orientation calculation part identifies the major orientations of feature points and helps in making the features invariant to rotational changes. This system is able to detect features upto 30 frames per second for an image of 320 × 256 pixels and provide a significant speedup at least one order of magnitude better than a PC based solution, with no significant increase in hardware costs.
Keywords :
computer architecture; feature extraction; field programmable gate arrays; image registration; transforms; FPGA-based accelerated hardware architecture; FPGA-based accelerated orientation calculation; LUT; SIFT; feature detection; feature point orientations; field programmable gate array; hardware costs; image pixels; real-time image registration; rotational change invariance; scale invariant feature transform; Feature extraction; Field programmable gate arrays; Hardware; Image registration; Real-time systems; Table lookup; FPGA SIFT;
Conference_Titel :
Microelectronics and Electronics (PrimeAsia), 2013 IEEE Asia Pacific Conference on Postgraduate Research in
Conference_Location :
Visakhapatnam
Print_ISBN :
978-1-4799-2750-0
DOI :
10.1109/PrimeAsia.2013.6731210
