DocumentCode :
3177391
Title :
Full-chip analysis of unintentional forward biased diodes
Author :
Grinshpon, Amir ; Schubert, Adam Segoli ; Lu, Ziyang
fYear :
2011
fDate :
14-16 March 2011
Firstpage :
1
Lastpage :
5
Abstract :
Multi-power domains have become a common practice in modern VLSI designs. As the number of different operational modes and different power schemes increases, the problem of unintentional forward-biased diodes, which cause power loss and chip malfunction, has become a critical issue. In this paper, we present a novel static analysis solution to detect unintentional forward biased diodes during full-chip verification, using a device-level vector-less approach. The key feature of our method is a hierarchical Multi-Stage Filtering algorithm, which drastically reduces the runtime. Our method has been extensively tested and verified in production flows.
Keywords :
MOSFET; VLSI; integrated circuit design; VLSI design; chip malfunction; device-level vector-less approach; full-chip analysis; full-chip verification; hierarchical multistage filtering algorithm; power loss; static analysis; unintentional forward biased diodes; Filtering; Logic gates; MOS devices; Resistors; Runtime; Semiconductor diodes; Transistors; Circuit analysis; circuit verification; multi-power domain; reliability; unintentional forward biased diode;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Quality Electronic Design (ISQED), 2011 12th International Symposium on
Conference_Location :
Santa Clara, CA
ISSN :
1948-3287
Print_ISBN :
978-1-61284-913-3
Type :
conf
DOI :
10.1109/ISQED.2011.5770704
Filename :
5770704
Link To Document :
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