Transient and fine-grained voltage adaptation for variation resilience in VLSI interconnects

Process variations and circuit aging continue to be a main challenge to the power-efficiency of VLSI circuits, as considerable power budget must be allocated to cushion timing variations. A design-time allocation implies a uniform power spending on all fabricated instances, even if many instances do not have strong variations. Adaptive design provides a power-efficient approach to variation tolerance, since it spends power only when the variations of a circuit instance are harmful. This work is an effort on supply voltage adaptation for variation resilience in VLSI interconnects. The main idea is boostable repeater design that can transiently and autonomously raise its Vdd to boost switching speed. The boosting can be turned on/off to compensate variations. Boostable repeater achieves finegrained voltage adaptation without stand-alone voltage regulators or additional power grid. Since interconnect is a widely recognized bottleneck to chip performance and tremendous repeaters are employed on chip designs, boostable repeater has plenty of chances to improve system robustness. Experimental results indicate that our approach significantly outperforms existing techniques including over-design, adaptive supply voltage and online adjustable buffer.