• DocumentCode
    3177477
  • Title

    Core-stateless fair rate estimation fair queuing

  • Author

    Li, Jung-Shim ; Lin, Yi-Ting ; Yang, Ching-Fang

  • Author_Institution
    Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
  • Volume
    2
  • fYear
    2002
  • fDate
    7-10 Oct. 2002
  • Firstpage
    1165
  • Abstract
    Core-stateless mechanisms, such as core-stateless fair queuing (CSFQ), reduce the complexity of fair queuing, which usually need to maintain state, manage buffers, and perform flow scheduling on a per flow basis. However, they require executing label rewriting and dropping decision on a per packet basis. This complexity may prevent them from being widely deployed. In this paper, we proposed a novel architecture based on CSFQ without per-packet labeling. Similarly, we distinguish edge routers and core routers. Edge routers maintain per flow state; they employ a fair queuing mechanism to allocate each flow a fair bandwidth share locally and a token bucket mechanism to regulate those flows with feedback packets sent from egress edge routers. Core routers do not maintain per flow state; they use FIFO packet scheduling extended by a fair rate alarm mechanism that uses an estimate of active flow number based on a matching-mismatching algorithm. The novel scheme is called core-stateless fair rate estimation fair queuing (CSFREFQ). We present and discuss simulations on the performance under different traffic scenarios.
  • Keywords
    Internet; bandwidth allocation; feedback; military communication; parameter estimation; queueing theory; routing protocols; telecommunication traffic; CSFREFQ; FIFO packet scheduling; active flow number estimation; bandwidth allocation; core routers; core-stateless fair rate estimation fair queuing; edge routers; feedback packets; matching-mismatching algorithm; military communication; per flow state; performance; rate alarm mechanism; token bucket mechanism; traffic; Bandwidth; Channel allocation; Engineering management; High-speed networks; Labeling; Processor scheduling; Round robin; Scheduling algorithm; State estimation; State feedback;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    MILCOM 2002. Proceedings
  • Print_ISBN
    0-7803-7625-0
  • Type

    conf

  • DOI
    10.1109/MILCOM.2002.1179643
  • Filename
    1179643