Title :
SCPlace: A statistical slack-assignment based constructive placer
Author :
Kounalakis, Evriklis ; Sotiriou, Christos P.
Author_Institution :
FORTH-ICS, Heraklion, Greece
Abstract :
Statistical optimization algorithms must be able to optimize both mean delay and standard deviation, sigma, as they need to either improve a circuit´s yield or to operate under a yield constraint. Wire delays pose a significant challenge for statistical placement, as they skew signal arrival times, and thus easily affect standard deviation. This paper presents a statistical, constructive placement algorithm, SCPlace, which is based on two novel, statistical slack assignment strategies, namely MSSA (Minimum Sigma Slack Assignment) and TSZSA (Target Sigma Zero Slack Assignment). MSSA assigns wire delays on nets so as to derive a lower sigma bound for a technology-mapped, standard-cell circuit, while TSZSA assigns wire delay bounds on nets for meeting a combined (mean, sigma) constraint. Experimental results, illustrate that SCPlacer´s constructive algorithm achieves legal, routable placements, and the statistical slack assignment strategy achieves a 4.68% yield improvement average for the IWLS 2005 benchmarks over an existing commercial placement tool.
Keywords :
circuit optimisation; delay circuits; network routing; wires (electric); MSSA; SCPlace; TSZSA; circuit yield; constructive placement algorithm; mean delay optimization; minimum sigma slack assignment; routable placement; standard deviation optimization; statistical optimization algorithm; statistical slack-assignment based constructive placer; target sigma zero slack assignment; technology-mapped standard-cell circuit; wire delays; Clustering algorithms; Delay; Integrated circuit modeling; Logic gates; Upper bound; Wire;
Conference_Titel :
Quality Electronic Design (ISQED), 2011 12th International Symposium on
Conference_Location :
Santa Clara, CA
Print_ISBN :
978-1-61284-913-3
DOI :
10.1109/ISQED.2011.5770717