DocumentCode :
3178216
Title :
A Novel Architecture of Sphere Decoder for Low Complexity and High Throughput
Author :
Lee, Jin ; Park, Sin-Chong
Author_Institution :
Sch. of Eng., Inf. & Commun. Univ., Daejeon
fYear :
2008
fDate :
21-24 Sept. 2008
Firstpage :
1
Lastpage :
5
Abstract :
Since finding the nearest point in a lattice for multi-input multi-output (MIMO) channels is NP-hard, simplified algorithms such as a sphere decoder (SD) have been proposed. In this paper, we propose a low area and high throughput sphere decoder based on the well-known one-node-per-cycle architecture and present the implementation result. Three key contributions are a new direct Schnorr-Euchener (SE) enumeration scheme for QAM modulation, an efficient storage manipulation and the calculation interleaving to reduce the critical path. Compared with current state-of-the-art sphere decoder architecture, the proposed sphere decoder can save 48% of hardware complexity and enhance 54% of the maximum operation clock frequency.
Keywords :
MIMO communication; channel coding; quadrature amplitude modulation; telecommunication channels; MIMO channel; NP-hard; QAM modulation; Schnorr-Euchener enumeration; multiinput multioutput channel; one-node-per-cycle architecture; sphere decoder; storage manipulation; Clocks; Computer architecture; Constellation diagram; Hardware; Interleaved codes; MIMO; Maximum likelihood decoding; Phase shift keying; Quadrature amplitude modulation; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Vehicular Technology Conference, 2008. VTC 2008-Fall. IEEE 68th
Conference_Location :
Calgary, BC
ISSN :
1090-3038
Print_ISBN :
978-1-4244-1721-6
Electronic_ISBN :
1090-3038
Type :
conf
DOI :
10.1109/VETECF.2008.96
Filename :
4656928
Link To Document :
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