Application of TSV integration and wafer bonding technologies for hermetic wafer level packaging of MEMS components for miniaturized timing devices

Author

Zoschke, K. ; Manier, C.-A. ; Wilke, M. ; Oppermann, H. ; Ruffieux, D. ; Dekker, J. ; Jaakkola, A. ; Dalla Piazza, S. ; Allegato, G. ; Lang, K.-D.

Author_Institution

Fraunhofer IZM, Berlin, Germany

fYear

2015

fDate

26-29 May 2015

Firstpage

1343

Lastpage

1350

Abstract

The paper presents different approaches for hermetic wafer level packaging of oscillator components like quartz crystals or silicon resonators. The proposed concepts involve technologies like TSV formation into passive or active silicon wafers, formation of proper bond frames on interposer, ASIC or cap wafers as well as hermetic bonding using AuSn soldering either in wafer to wafer style or with reconfigured components on a carrier wafer.

Keywords

application specific integrated circuits; gold compounds; micromechanical devices; silicon; soldering; three-dimensional integrated circuits; timing circuits; wafer bonding; wafer level packaging; ASIC; AuSn; MEMS components; Si; TSV integration; active wafers; bond frames; cap wafers; carrier wafer; hermetic wafer level packaging; miniaturized timing devices; oscillator components; passive wafers; quartz crystals; resonators; soldering; wafer bonding technology; wafer to wafer style; Bonding; CMOS integrated circuits; Gold; Packaging; Silicon; Through-silicon vias; Wafer bonding;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Components and Technology Conference (ECTC) , 2015 IEEE 65th

Conference_Location

San Diego, CA

Type

conf

DOI

10.1109/ECTC.2015.7159772

Filename

7159772