Stratus: Free design of highly parametrized VLSI modules interoperable with commercial tools

Author

Belloeil-Dupuis, Sophie ; Chotin-Avot, Roselyne ; Mehrez, Habib

Author_Institution

LIP6/SOC Lab., Univ. Paris VI, Paris, France

fYear

2011

fDate

14-16 March 2011

Firstpage

1

Lastpage

6

Abstract

Stratus is an open-source language based upon Python dedicated to the generation of VLSI modules. It allows design reuse, by providing a virtual library of configurable IP blocks. It provides also optimization techniques that can be applied during datapath synthesis. In this paper, we present how Stratus provides a programming framework allowing fast prototyping of parametrized Digital Signal Processing applications, ASIC or FPGA-targeted.

Keywords

VLSI; application specific integrated circuits; field programmable gate arrays; hardware description languages; logic CAD; programming languages; ASIC; FPGA-targeted; Python; Stratus; commercial tools; configurable IP blocks; datapath synthesis; design reuse; fast prototyping; highly parametrized VLSI modules; open-source language; optimization techniques; parametrized digital signal processing applications; programming framework; virtual library; Adders; Application specific integrated circuits; Field programmable gate arrays; Finite impulse response filter; Hardware design languages; Optimization; Synthesizers; datapath; open-source; synthesis;

fLanguage

English

Publisher

ieee

Conference_Titel

Quality Electronic Design (ISQED), 2011 12th International Symposium on

Conference_Location

Santa Clara, CA

ISSN

1948-3287

Print_ISBN

978-1-61284-913-3

Type

conf

DOI

10.1109/ISQED.2011.5770774

Filename

5770774