DocumentCode :
3178849
Title :
Cost-effective optimization of serial link system for Signal Integrity and Power Integrity
Author :
Nagpal, Raj Kumar ; Tripathi, Jai Narayan ; Malik, Rakesh
Author_Institution :
STMicroelectronics Pvt. Ltd., Noida, India
fYear :
2011
fDate :
14-16 March 2011
Firstpage :
1
Lastpage :
5
Abstract :
Signal Integrity (SI) and Power Integrity (PI) are the most important characteristics for system level design, simulation and analysis of high speed systems. In this paper, HSLINK system is optimized for better SI and PI. Linear models for eye amplitude and jitter are derived by Design of Experiments (DOE). Cost effective solution strategy is also presented using linear models obtained.
Keywords :
design of experiments; network synthesis; optimisation; HSLINK system; cost effective optimization; cost effective solution strategy; design of experiment; eye amplitude; high speed system; jitter; linear model; power integrity; serial link system; signal integrity; system level design; Impedance; Jitter; Optimization; Sensitivity; Silicon; US Department of Energy; Universal Serial Bus; Design of Experiments (DOE); Optimization; Orthogonal Arrays; Power Integrity; Serial Links; Signal Integrity;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Quality Electronic Design (ISQED), 2011 12th International Symposium on
Conference_Location :
Santa Clara, CA
ISSN :
1948-3287
Print_ISBN :
978-1-61284-913-3
Type :
conf
DOI :
10.1109/ISQED.2011.5770781
Filename :
5770781
Link To Document :
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