DocumentCode :
3178917
Title :
Process variation aware system-level load assignment for total energy minimization using stochastic ordering
Author :
Golshan, Shahin ; Singhal, Love ; Bozorgzadeh, Eli
Author_Institution :
Center of Embedded Comput. Syst., Univ. of California, Irvine, CA, USA
fYear :
2011
fDate :
14-16 March 2011
Firstpage :
1
Lastpage :
6
Abstract :
Design variability due to within-die and die-to-die variations has potential to significantly increase the maximum operating clock period and the leakage power of the system in future process technology generations. When minimizing total energy of an MPSoC system, the variations in both the clock period and the leakage power of the multiple cores have to be taken into account. This paper targets system level task allocation to stochastically minimize the total energy of the system running multiple applications on MPSoC under process variation. In this work, we first introduce an integrated model for the total energy of the system which incorporates all the factors-dynamic energy, variations in leakage energy and variations in clock frequency. Our model shows very close correlation with the energy of the system computed using empirical methods. The proposed energy model enables efficient computation in the task allocation tools without requiring highly expensive stochastic analysis. We apply this model in allocating tasks in the embedded system benchmark suites on MPSoC. In addition, we propose a technique for allocating tasks that maximizes the energy yield of the system over an interval of energy constraints rather than a single energy constraint. In our experiments, we show that using our technique, we improve the average yield of the system significantly. Our experiments show that we can reach up to 5.3 times improvement in average yield of the energy constraints which translates into 0.6 increase in yield of the energy constraints on average.
Keywords :
Monte Carlo methods; embedded systems; multiprocessing systems; stochastic processes; system-on-chip; MPSoC system; Monte-Carlo simulation; clock frequency; embedded system benchmark; empirical methods; expensive stochastic analysis; factor-dynamic energy; process variation aware system-level load assignment; single energy constraint; stochastic ordering; system level task allocation; total energy minimization; Clocks; Computational modeling; Delay; Logic gates; Optimization; Random variables; Resource management;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Quality Electronic Design (ISQED), 2011 12th International Symposium on
Conference_Location :
Santa Clara, CA
ISSN :
1948-3287
Print_ISBN :
978-1-61284-913-3
Type :
conf
DOI :
10.1109/ISQED.2011.5770784
Filename :
5770784
Link To Document :
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