Crosstalk challenge and mitigation through strategic pin placement for 25Gbps and beyond

In high density, high speed Serdes interconnect designs, inappropriate pin placement can lead to differential crosstalk violation. How to relatively compare the crosstalk level due to various pin placements, and estimate its effect on the whole system without time consuming simulation is critical. This paper introduces a simple method to estimate the relative differential crosstalk due to various pin distributions. The effectiveness of this method is investigated using commercial 3D electromagnetic software. How the surrounding environment can affect the crosstalk level is also studied in this article.