Title :
C-2C ladder based D/A converters for two metal CMOS process
Author :
Singh, S.P. ; Hanson, J.V. ; Vlach, J.
Author_Institution :
Dept. of Electr. Eng., Waterloo Univ., Ont., Canada
Abstract :
Three 8-bit C-2C ladder based D/A converter circuits are presented that utilize interlayer capacitors available in a two-metal CMOS process and need no process modification. The capacitances, being of a similar order, are used to form individual capacitors in the C-2C ladder. This leads to a lower unit capacitor number requirement and a saving of silicon area.<>
Keywords :
CMOS integrated circuits; analogue-digital conversion; ladder networks; 8 bit; C-2C ladder; D/A converter circuits; DAC; Si; capacitances; interlayer capacitors; two metal CMOS process; CMOS process; Capacitors; Circuits; Fabrication; Parasitic capacitance; Silicon; Voltage;
Conference_Titel :
Communications, Computers and Signal Processing, 1989. Conference Proceeding., IEEE Pacific Rim Conference on
Conference_Location :
Victoria, BC, Canada
DOI :
10.1109/PACRIM.1989.48310
