Fast multi-resolution motion estimation algorithm and its VLSI architecture

Author

Song, Byung Cheol ; Kim, Nak Hoon ; Lim, Dong Keun ; Kim, Tae Hee ; Ko, Jun Hyuk ; Chun, Kang Wook

Author_Institution

Digital Media R&D Center, Samsung Electron. Co. Ltd., South Korea

fYear

2005

fDate

8-12 Jan. 2005

Firstpage

71

Lastpage

72

Abstract

This work presents a fast multi-resolution block-matching algorithm (FMRME) for MPEG-2 video encoding, which provides an outstanding PSNR performance close to the full search algorithm. We also propose the hardware architecture of the FMRME for real-time MPEG-2 video encoding with a large search range of [-192.0, +191.5]. Due to efficient data reuse and parallel processing, the utilization percentage of PE is also very high. We implemented this architecture with about 100 K gates and 5 K bytes SPSRAM.

Keywords

VLSI; image matching; image resolution; motion estimation; parallel processing; search problems; video coding; MPEG-2 video encoding; PSNR performance; SPSRAM; VLSI architecture; block-matching algorithm; data reuse; hardware architecture; multi-resolution motion estimation; parallel processing; real-time video encoding; Computational complexity; Computer architecture; Degradation; Encoding; HDTV; Hardware; Motion estimation; PSNR; Research and development; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Consumer Electronics, 2005. ICCE. 2005 Digest of Technical Papers. International Conference on

Print_ISBN

0-7803-8838-0

Type

conf

DOI

10.1109/ICCE.2005.1429722

Filename

1429722