Title :
FPGA Design for PCANet Deep Learning Network
Author :
Yuteng Zhou ; Wei Wang ; Xinming Huang
Author_Institution :
Dept. of Electr. & Comput. Eng., Worcester Polytech. Inst., Worcester, MA, USA
Abstract :
In recent years, deep learning has attracted lots of research interests for pattern recognition and artificial intelligence. PCA Network (PCANet) is a simple deep learning network with highly competitive performance for texture classification and object recognition. When compared to other deep neural networks such as convolutional neural network (CNN), PCANet has much simpler structure, which makes it attractive for hardware design on an FPGA. In this paper, an efficient, high-throughput, pipeline architecture is proposed for the PCANet classifier. The implementation on an FPGA is more than 1,000 times faster than software execution on a general purpose processor. When evaluated using the MNIST handwritten digits dataset, the PCANet design results an accuracy of about 99.46%.
Keywords :
field programmable gate arrays; handwritten character recognition; image classification; learning (artificial intelligence); neural nets; CNN; FPGA design; MNIST handwritten digits dataset; PCA network; PCANet classifier; PCANet deep learning network; convolutional neural network; field programmable gate array; general purpose processor; object recognition; software execution; texture classification; Computer architecture; Convolutional codes; Field programmable gate arrays; Hardware; Neural networks; Pipelines; Principal component analysis; Deep Learning; FPGA; MNIST; PCANet;
Conference_Titel :
Field-Programmable Custom Computing Machines (FCCM), 2015 IEEE 23rd Annual International Symposium on
Conference_Location :
Vancouver, BC
DOI :
10.1109/FCCM.2015.45