Title :
Adhesion issues in flip-chip on organic modules
Author :
Tran, S.K. ; Questad, D.L. ; Sammakia, B.G.
Author_Institution :
IBM Corp., Endicott, NY, USA
Abstract :
Flip chip attach on organic carriers is a novel electronic packaging assembly method which provides advantages of high I/O counts, electrical performance and thermal dissipation. In this structure, the flip chip device is attached to the organic laminate with predeposited eutectic solder. Mechanical coupling of chip and laminate is done via underfill encapsulant materials. As the chip size increases, the thermal mismatch between silicon and its organic carrier become greater. Adhesion becomes an important factor, since the C4 joints fail quickly if delamination of the underfill from either the chip or the solder mask interface occurs. Newly developed underfills have been studied to examine their properties, including interfacial adhesion strength, flow characteristics, void formation and cure kinetics. This paper describes basic investigations into the properties of these underfills and also how these properties related to the overall development process. In addition, experiments were performed to determine the effects on adhesion degradation of flip chip assembly processes and materials such as IR reflow profile, flux quantity and residues. Surface treatment of both the chip and the laminate prior to encapsulation were studied to enhance underfill adhesion. Accelerated thermal cycling and HAST (highly accelerated stress testing) were conducted to compare various underfill properties and reliability responses
Keywords :
adhesion; chip-on-board packaging; cooling; delamination; encapsulation; flip-chip devices; integrated circuit packaging; integrated circuit reliability; interface structure; laminates; life testing; reaction kinetics; reflow soldering; surface treatment; thermal management (packaging); thermal stresses; voids (solid); C4 joints; HAST; I/O count; IR reflow profile; accelerated thermal cycling; adhesion; adhesion degradation; chip size; chip surface treatment; chip-laminate mechanical coupling; cure kinetics; electrical performance; electronic packaging assembly method; encapsulation; flip chip assembly materials; flip chip assembly processes; flip chip attach; flip chip device; flip-chip on organic modules; flow characteristics; flux quantity; flux residues; highly accelerated stress testing; interfacial adhesion strength; laminate surface treatment; organic carriers; organic laminate; predeposited eutectic solder; reliability; silicon chip; solder mask interface; thermal dissipation; thermal mismatch; underfill adhesion; underfill delamination; underfill encapsulant materials; underfill materials; underfill properties; void formation; Adhesives; Assembly; Delamination; Electronic packaging thermal management; Electronics packaging; Flip chip; Laminates; Life estimation; Silicon; Thermal stresses;
Conference_Titel :
Thermal and Thermomechanical Phenomena in Electronic Systems, 1998. ITHERM '98. The Sixth Intersociety Conference on
Conference_Location :
Seattle, WA
Print_ISBN :
0-7803-4475-8
DOI :
10.1109/ITHERM.1998.689559