Title :
An SBNR floating-point convention
Author :
Morales, Octavio J.
Author_Institution :
Space Tech Corp., Fort Collins, CO, USA
Abstract :
Three conflicting needs are identified in real-time scientific and military applications: high precision, to minimize rounding errors; wide dynamic range, to avoid overflow; and speed, to accommodate wideband signals. These three requirements are mutually exclusive in the sense that higher accuracy and wider range usually entail a decrease in throughput. To resolve the conflict, a floating-point signed-binary-number representation (SBNR) is described that exploits all of the characteristics of a redundant number system, while providing the wide dynamic range desired. When coupled with multiple-value logic (MVL), the proposed implementation is considered to offer potential for reducing on-chip interconnect area, and thus for minimizing chip pin-out, without exacerbating the already critical reliability issues
Keywords :
binary sequences; digital arithmetic; number theory; SBNR floating-point convention; floating-point signed-binary-number representation; military applications; multiple-value logic; real time applications; redundant number system; reliability; rounding errors; scientific applications; speed; wide dynamic range; wideband signals; Dynamic range; Microprocessors; Multivalued logic; Power system interconnection; Roundoff errors; Semiconductor device packaging; Signal resolution; Throughput; Very high speed integrated circuits; Very large scale integration;
Conference_Titel :
IEEE Region 5 Conference, 1988: 'Spanning the Peaks of Electrotechnology'
Conference_Location :
Colorado Springs, CO
DOI :
10.1109/REG5.1988.15889