A DoE of Thermal Management for FC on LTCC

Author

Noren, M. ; Brunner, S. ; Hoffmann, C. ; Salz, W. ; Block, C.

fYear

2007

fDate

26-28 June 2007

Firstpage

1

Lastpage

4

Abstract

The thermal management for FC (flip chip) on the LTCC has to be better understood, in order to meet this requirement. Therefore a DoE (design of experiment) was developed and LTCC-thickness, thermal vias, heatspreader and underfill were used as parameters. The test die has a heating resistor to simulate the power loss in the amplifier and a diode circuit. With the voltage drop over the diode, the die temperature can be calculated. The test die also contains a daisy chain which will be used later on for reliability investigations during thermal cycling and high temperature storage. For more detailed understanding of the thermal management an FE-model (finite element) was used. The FE-model was calibrated, using the results of the experimental setup. The usage of FE-modeling will shorten the design phase of a project significantly.

Keywords

ceramic packaging; cryogenic electronics; design of experiments; finite element analysis; flip-chip devices; integrated circuit design; integrated circuit modelling; integrated circuit packaging; integrated circuit reliability; thermal management (packaging); LTCC; design of experiment; diode circuit; finite element model; flip chip; heating resistor; power loss; reliability investigations; semiconductor die daisy chain; thermal cycling; thermal management; voltage drop; Circuit simulation; Circuit testing; Diodes; Flip chip; Heating; Power amplifiers; Resistors; Temperature; Thermal management; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

High Density packaging and Microsystem Integration, 2007. HDP '07. International Symposium on

Conference_Location

Shanghai

Print_ISBN

1-4244-1253-6

Electronic_ISBN

1-4244-1253-6

Type

conf

DOI

10.1109/HDP.2007.4283602

Filename

4283602