CAD synthesis of interstage networks for multi-stage amplifiers with a wide range of topologies

A brief review is presented of the techniques and capabilities of computer-aided design (CAD) synthesis algorithms for the design of interstage FET amplifier networks with arbitrary topologies. The algorithms described allow specification of arbitrary impedance levels and inclusion of parasitic elements at both ends of a matching network. In addition to the specification of any desired source (impedance and parasitic) and load (impedance and parasitic), the designer specifies a desired bandwidth, ripple, gain slope, response type (equiripple or maximally flat), and topology. The CAD synthesis algorithms provide the matching networks to the given specifications in an automated and time-effective manner. Specific ultrawideband amplifier design examples are given which illustrate the effectiveness of the CAD synthesis algorithms and design techniques.<>