A high-speed mobile OFDM receiver LSI with an iterative noise-reduction filter to enhance channel estimation

Author

Kamiyama, Kazuhiro ; Mizutani, Hiroyuki ; Toma, Hajime ; Kaneda, Yoshitomo ; Tamaki, Sho ; Pham, Dang Hai ; Wada, Tomohisa

Author_Institution

Magna Design Net Inc., Okinawa, Japan

fYear

2005

fDate

8-12 Jan. 2005

Firstpage

193

Lastpage

194

Abstract

This work presents an OFDM receiver LSI with an iterative noise-reduction filter. Experimental results show that the LSI drastically improves the mobile reception performance, especially in high-speed environments. The die is fabricated with 0.18 um CMOS process, including ADC, DAC, and PLL.

Keywords

CMOS integrated circuits; OFDM modulation; analogue-digital conversion; channel estimation; digital filters; digital video broadcasting; digital-analogue conversion; iterative methods; large scale integration; mobile communication; phase locked loops; signal denoising; television interference; television receivers; television reception; 0.18 micron; ADC; CMOS process; DAC; LSI; PLL; channel estimation; high-speed OFDM receiver; iterative noise-reduction filter; mobile OFDM receiver; mobile reception performance; Channel estimation; Communication standards; Data communication; Digital multimedia broadcasting; Filters; Gaussian noise; Interpolation; Large scale integration; Multiplexing; OFDM;

fLanguage

English

Publisher

ieee

Conference_Titel

Consumer Electronics, 2005. ICCE. 2005 Digest of Technical Papers. International Conference on

Print_ISBN

0-7803-8838-0

Type

conf

DOI

10.1109/ICCE.2005.1429783

Filename

1429783