DocumentCode :
3183742
Title :
Technologies for reducing power
Author :
Mudge, Trevor
Author_Institution :
Univ. of Michigan, Ann Arbor, MI, USA
fYear :
2010
fDate :
19-22 July 2010
Abstract :
With power and cooling becoming an increasingly costly part of the operating cost of a server, the old trend of striving for higher performance with little regard for power is over. Emerging semiconductor process technologies, multicore architectures, and new interconnect technology provide an avenue for future servers to become low power, compact, and possibly mobile. In our talk we examine three techniques for achieving low power: 1) Near threshold operation; 2) 3D die stacking; and 3) replacing DRAM with Flash memory.
Keywords :
computer architecture; flash memories; low-power electronics; multiprocessing systems; multiprocessor interconnection networks; power aware computing; 3D die stacking; flash memory; interconnection technology; low power electronics; multicore architecture; near threshold operation; power reduction; semiconductor process technology; server; Chip scale packaging; Computer science; Electrical engineering; Multicore processing; Servers; Stacking;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Embedded Computer Systems (SAMOS), 2010 International Conference on
Conference_Location :
Samos
Print_ISBN :
978-1-4244-7936-8
Electronic_ISBN :
978-1-4244-7938-2
Type :
conf
DOI :
10.1109/ICSAMOS.2010.5642082
Filename :
5642082
Link To Document :
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