DocumentCode
3184074
Title
Hybrid Data Structure for IP Lookup in Virtual Routers Using FPGAs
Author
Erdem, Oguzhan ; Le, Hoang ; Prasanna, Viktor K. ; Bazlamaçci, C.F.
Author_Institution
Electr. & Electron. Eng., Middle East Tech. Univ., Ankara, Turkey
fYear
2011
fDate
1-3 May 2011
Firstpage
253
Lastpage
253
Abstract
This paper makes the following contributions: 1) A compact trie representation and a hybrid data structure for IP lookup that reduces the memory consumption while eliminating backtracking. 2) A merging algorithm that eliminates leaf pushing and simplifies table updates in virtual routers.
Keywords
field programmable gate arrays; merging; table lookup; tree data structures; FPGA; IP lookup; backtracking elimination; compact trie representation; hybrid data structure; leaf pushing; memory consumption reduction; merging algorithm; table update; virtual router; Data structures; Electronic mail; Field programmable gate arrays; Memory management; Merging; Routing; System-on-a-chip; FPGA; IP Lookup; Network virtualization; Pipelined architecture; Virtual router;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Custom Computing Machines (FCCM), 2011 IEEE 19th Annual International Symposium on
Conference_Location
Salt Lake City, UT
Print_ISBN
978-1-61284-277-6
Electronic_ISBN
978-0-7695-4301-7
Type
conf
DOI
10.1109/FCCM.2011.42
Filename
5771284
Link To Document