Implementation and Performance Comparison of the Motion Compensation Kernel of the AVS Video Decoder on FPGA, GPU and Multicore Processors

Author

Owaida, M. ; Bellas, N. ; Antonopoulos, C.D. ; Daloukas, K. ; Antoniadis, Ch ; Krommydas, K. ; Tsoumblekas, G.

Author_Institution

Dept. of Comp. & Comm. Eng., Univ. of Thessaly, Volos, Greece

fYear

2011

fDate

1-3 May 2011

Firstpage

255

Lastpage

255

Abstract

Next generation video standards have strict and increasing performance demands due to real-time requirements and the trend towards higher frame resolutions and bit rates. Leveraging the advantages of reconfigurable logic and emerging multi-core processor architectures to exploit all levels of parallelism of such workloads is necessary to achieve real time functionality at a reasonable cost.

Keywords

coprocessors; decoding; field programmable gate arrays; motion compensation; multiprocessing systems; video coding; AVS video decoder; FPGA; GPU; motion compensation kernel; multicore processor architecture; reconfigurable logic; video standard; Decoding; Field programmable gate arrays; Graphics processing unit; Motion compensation; Multicore processing; Optimization; Parallel processing; AVS Motion Compensation; FPGA; GPU; Multi-cores; Reconfigurable Computing; Video Compression;

fLanguage

English

Publisher

ieee

Conference_Titel

Field-Programmable Custom Computing Machines (FCCM), 2011 IEEE 19th Annual International Symposium on

Conference_Location

Salt Lake City, UT

Print_ISBN

978-1-61284-277-6

Electronic_ISBN

978-0-7695-4301-7

Type

conf

DOI

10.1109/FCCM.2011.32

Filename

5771286