Experimental results for current-based analog scan

Author

Soma, Mani ; Bocek, Thomas M. ; Vu, Tuyen D. ; Moffatt, Jason D.

Author_Institution

Washington Univ., Seattle, WA, USA

fYear

1997

fDate

1-6 Nov 1997

Firstpage

768

Lastpage

775

Abstract

This paper presents the design of current-mode circuits for analog scan, which include the highly accurate current-mirror scan latches and the analog shift registers. Experimental data from a test chip fabricated in Orbit 2-micron CMOS Foresight process illustrates that the accuracy of the circuits is sufficient for use in analog on-chip scan-based testing. The interface between analog scan and the P1149.4 test bus is discussed to show system-level applications of this technique

Keywords

CMOS analogue integrated circuits; analogue processing circuits; automatic testing; current-mode logic; design for testability; integrated circuit testing; 2 micron; DFT; Orbit CMOS Foresight process; P1149.4 test bus; analog shift registers; current-based analog scan; current-mirror scan latches; current-mode circuits; on-chip scan-based testing; system-level applications; Built-in self-test; CMOS process; Capacitors; Circuit testing; Circuit topology; Design for testability; Latches; Mirrors; System testing; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 1997. Proceedings., International

Conference_Location

Washington, DC

ISSN

1089-3539

Print_ISBN

0-7803-4209-7

Type

conf

DOI

10.1109/TEST.1997.639690

Filename

639690

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=318413