Title :
Analysis of different techniques for low power Single Edge Triggered Flip Flops
Author :
Khan, Imran Ahmed ; Shah, Owais Ahmad ; Beg, Mirza Tariq
Author_Institution :
Deptt of Electron. & Comn, Jamia Millia Islamia, New Delhi, India
Abstract :
In this paper, we compared various different techniques of previously published Single Edge Triggered Flip Flops (SET FFs). Flip Flops are most essential elements in the design of sequential circuits. We did the comparison for their performance and power dissipation and have also compared the transistor count of each Flip Flop.
Keywords :
flip-flops; logic design; sequential circuits; SET-FF; low power single edge triggered flip flops; power dissipation; sequential circuit design; transistor count; Clocks; Delay; Latches; Logic gates; MOSFETs; Power dissipation; Low voltage swapped body bias; Pass Transistor; Semi-static; Short circuit current; Sub-threshold grounded body bias; Transmission Gate;
Conference_Titel :
Information and Communication Technologies (WICT), 2011 World Congress on
Conference_Location :
Mumbai
Print_ISBN :
978-1-4673-0127-5
DOI :
10.1109/WICT.2011.6141447
