DocumentCode :
3184567
Title :
A platform-based de-blocking filter design with bus-interleaved architecture for H.264
Author :
Chang, Shih-Chien ; Peng, Wen-Hsiao ; Wang, Shih-Hao ; Chiang, Tihao
Author_Institution :
Nat. Chiao Tung Univ., Hsinchu, Taiwan
fYear :
2005
fDate :
8-12 Jan. 2005
Firstpage :
293
Lastpage :
294
Abstract :
We present an ARM platform-based architecture design for the de-blocking filter in H.264. According to statistical analysis, we propose an adaptive transmission scheme to reduce the bus workload. Moreover, we develop a bus-interleaved architecture to reduce the processing latency. As compared to the state-of-the-art designs, our scheme offers 3× to 14× performance improvement. Furthermore, we have proved our design using an ARM emulation board.
Keywords :
adaptive filters; code standards; pipeline processing; statistical analysis; video coding; ARM emulation board; ARM platform-based architecture; H.264; adaptive transmission scheme; bus-interleaved architecture; performance improvement; platform-based de-blocking filter; processing latency; reduced bus workload; statistical analysis; Adaptive filters; Computer architecture; Data communication; Decoding; Delay; Emulation; Filtering; Finite impulse response filter; Statistical analysis; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Consumer Electronics, 2005. ICCE. 2005 Digest of Technical Papers. International Conference on
Print_ISBN :
0-7803-8838-0
Type :
conf
DOI :
10.1109/ICCE.2005.1429833
Filename :
1429833
Link To Document :
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