Title :
High-Speed Experimental Demonstration of Adiabatic Quantum-Flux-Parametron Gates Using Quantum-Flux-Latches
Author :
Takeuchi, N. ; Ortlepp, Thomas ; Yamanashi, Y. ; Yoshikawa, N.
Author_Institution :
Dept. of Electr. & Comput. Eng., Yokohama Nat. Univ., Yokohama, Japan
Abstract :
We experimentally demonstrated high-speed logic operations of adiabatic quantum-flux-parametron (AQFP) gates through the use of quantum-flux-latches (QFLs). In QFL-based high-speed test circuits (QHTCs), the output data of the circuits under test (CUTs), which are driven by high-speed excitation currents, are stored in QFLs and are slowly read out using low-speed excitation currents. We designed and fabricated three types of QHTCs using QFLs with different circuit parameters, where the CUTs were buffer gates and and gates. We confirmed the correct operation of buffer gates and and gates at 1 GHz. The obtained bias margins of the 1 GHz excitation currents were more than ±30% for each QHTC, which is wide enough for high-speed logic operations of AQFP gates.
Keywords :
buffer circuits; logic gates; parametric oscillators; superconducting logic circuits; AND gate operation; adiabatic quantum-flux-parametron gates; bias margins; buffer gate operation; circuit parameters; frequency 1 GHz; high-speed excitation currents; high-speed experimental demonstration; high-speed logic operations; low-speed excitation currents; output data; quantum-flux-latch-based high-speed test circuits; Energy dissipation; Energy efficiency; Inductance; Junctions; Latches; Logic gates; Superconducting integrated circuits; Adiabatic logic; Josephson circuits; adiabatic quantum-flux-parametron (AQFP); high-speed operation; latch; superconducting integrated circuits;
Journal_Title :
Applied Superconductivity, IEEE Transactions on
DOI :
10.1109/TASC.2014.2311444