Component performance associated with power/return plane bounce using board edge termination

This paper illustrates effects on digital components due to reflected EM waves created by different board edge termination methodologies. Depending on the physical location of a digital device, relative to the edge of the printed circuit board (PCB), either a voltage or return plane bounce may occur that exceeds operational margin levels of these devices Regardless of design techniques implemented or simulation analysis performed, undesired RF field development will still occur within any power distribution network (PDN), which for most electrical products, is both a power and a return plane (OV reference or ground). Common-mode currents within a PDN are developed by large repetitive impulse currents demanded by digital circuits. This is caused by inadequate decoupling that serves as charge storage, along with board resonances. With a non-optimized PDN, simultaneously switching noise (SSN) as well as electromagnetic interference may occur. In addition, if the bounce on either the voltage and/or return plane exceeds voltage reference levels, devices may not function reliably.