Title :
Real time, nonintrusive instrumentation of reduced instruction set computer (RISC) microprocessors
Author :
Cannon, William J. ; Michael, Mark T. ; Beeson, Dennnis D.
Author_Institution :
CTA Inc., Ridgecrest, CA, USA
Abstract :
It is noted that real-time, nonintrusive instrumentation (RTNI) of high-performance RISC (reduced-instruction-set computer) microprocessors will be very difficult without some on-chip circuitry to support the event detection and data acquisition logic used to distinguish instruction execution flow and data generation and usage. The authors present a conceptual approach to providing unprecedented RTNI capabilities with a minimal amount of additional on-chip circuitry. In addition, through the use of the same pipelining and parallelism techniques used to implement the RISC microprocessor itself, the RTNI circuitry will impose little or no performance impact on the basic chip operating speed. The proposed approach does not perturb the system being monitored, so that the observations made are accurate and of high fidelity. In addition to providing highly selective, focused data acquisition, a large number of unique and/or generic events can be detected and acquired for a broad view of system operation. Combined with appropriate external support equipment and workstation software, this will result in a highly productive and capable integration and test environment
Keywords :
microprocessor chips; parallel architectures; performance evaluation; pipeline processing; real-time systems; reduced instruction set computing; RTNI capabilities; chip operating speed; data acquisition; data acquisition logic; data generation; event detection; external support equipment; instruction execution flow; nonintrusive instrumentation; parallelism techniques; pipelining; real-time systems; reduced instruction set computer; workstation software; Computer aided instruction; Data acquisition; Data flow computing; Event detection; Instruments; Logic circuits; Microprocessors; Parallel processing; Pipeline processing; Reduced instruction set computing;
Conference_Titel :
Aerospace and Electronics Conference, 1992. NAECON 1992., Proceedings of the IEEE 1992 National
Conference_Location :
Dayton, OH
Print_ISBN :
0-7803-0652-X
DOI :
10.1109/NAECON.1992.220568