DocumentCode :
3185181
Title :
The implementation of computer Bus-RAM based on FPGA
Author :
Dong, Yin ; Yang, Jun ; Zhang, Weiping ; Wang, Xiaojun
Author_Institution :
Sch. of Inf. Sci. & Eng., Yunnan Univ., Kunming, China
fYear :
2011
fDate :
8-10 Aug. 2011
Firstpage :
2554
Lastpage :
2557
Abstract :
Along with the rapid application of large-scale integrated circuit, computer system is growing by geometric series, the boundary between hardware and software has blurred. FPGA, a novel technology arisen in recent years has been challenged with the traditional hardware design, because the original method and mode cannot satisfy modern hardware system design. In this paper, we implement the complex design in a new way, where programmable logic undoubtedly become the best suited technology.
Keywords :
field programmable gate arrays; integrated circuit design; random-access storage; FPGA; computer bus-RAM; computer system; geometric series; hardware system design; large-scale integrated circuit; programmable logic; Computers; Emulation; Field programmable gate arrays; Hardware; Random access memory; Software; Systematics; BUS; FPGA; Programmable Logic; RAM;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Artificial Intelligence, Management Science and Electronic Commerce (AIMSEC), 2011 2nd International Conference on
Conference_Location :
Deng Leng
Print_ISBN :
978-1-4577-0535-9
Type :
conf
DOI :
10.1109/AIMSEC.2011.6011193
Filename :
6011193
Link To Document :
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