DocumentCode
3185762
Title
A study on fault arc and its influence on digital fault locator performance
Author
Funabashi, T. ; Otoguro, H. ; Dube, L. ; Kizilcay, M. ; Ametani, A.
Author_Institution
Meidensha Corp., Tokyo, Japan
fYear
2001
fDate
2001
Firstpage
418
Lastpage
421
Abstract
Many fault locator algorithms were developed to be operated on digital relay data. The methods were derived from frequency domain equations and were established by a phasor simulation. The algorithms were based on the assumption that a fault arc had a constant impedance and did not show a nonlinear effect. But in practice, a fault arc in air is known to show nonlinearity due to its physical characteristic. To study the influence of the nonlinearity on the accuracy of a digital fault locator, a time domain simulation must be performed considering the characteristic of the fault arc. In the present paper, a time domain model of a fault locator and that of a fault arc are represented using the MODELS language in the ATP-EMTP. Various fault types are modeled considering constant and nonlinear fault resistances. The simulation results have shown that the impedance relay type method using one terminal voltage and currents is influenced by the nonlinear characteristic of the fault arc, while the current diversion ratio method using one terminal currents for two circuits is not. A sensitivity analysis of the locating error with respect to the model parameters of the nonlinear arc was performed for the impedance relay type method. It has been confirmed that the greater the degree of nonlinearity, the greater the location error
Keywords
EMTP; arcs (electric); digital instrumentation; fault location; sensitivity analysis; time-domain analysis; ATP-EMTP; MODELS language; constant fault resistance; constant impedance; current diversion ratio method; digital fault locator performance; digital relay data; fault arc; fault locator; frequency domain equations; impedance relay type method; nonlinear arc; nonlinear characteristic; nonlinear effect; nonlinear fault resistance; phasor simulation; terminal voltage; time domain model; time domain simulation;
fLanguage
English
Publisher
iet
Conference_Titel
Developments in Power System Protection, 2001, Seventh International Conference on (IEE)
Conference_Location
Amsterdam
ISSN
0537-9989
Print_ISBN
0-85296-732-2
Type
conf
DOI
10.1049/cp:20010188
Filename
929352
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