Title :
Low quiescent current LDO with improved load transient
Author :
Strik, S. ; Strik, V.
Author_Institution :
Nat. Semicond. Estonia, Tallinn
Abstract :
Design analysis of CMOS low dropout regulator (LDO)focusing on low quiescent current and load transient improvement methodologies and structures are discussed in this paper.Low quiescent current in battery-operated systems is an intrinsic performance parameter because it partially determines battery life. Load transient improvement helps avoiding malfunction, reset, latch up or fail of microprocessor which is supplied from the LDO. Some low quiescent current LDOs witmicroprocessh improved load transient are included and analysed.
Keywords :
CMOS integrated circuits; controllers; integrated circuit design; microprocessor chips; CMOS low dropout regulator focusing; battery-operated system; design analysis; load transient improvement methodologies; low quiescent current LDO; microprocessor; Batteries; Delay effects; Digital circuits; Error correction; Latches; Parasitic capacitance; Power transistors; Regulators; Transient analysis; Voltage;
Conference_Titel :
Electronics Conference, 2008. BEC 2008. 11th International Biennial Baltic
Conference_Location :
Tallinn
Print_ISBN :
978-1-4244-2059-9
Electronic_ISBN :
1736-3705
DOI :
10.1109/BEC.2008.4657495
