Calculation of the diagnosibility of digital circuits without using fault models

The problem of embedded fault diagnosis in digital systems based on Built-In Self-Test (BIST) facilities is discussed. The main concern is related to the weak diagnostic capability of BIST. A BIST architecture is described which is based on multiple signature analyzers (SA) to provide better diagnostic resolution. A new conception for the diagnosis of digital circuits, which does not use fault models, and a method for calculating the diagnosibility of the given circuit are presented The results of calculation can be used for redesign of the circuit for better diagnosibility. Experimental results provide the data which characterize the diagnosibility for a family of ISCAS benchmark circuits.