System on a programmable chip oriented JPEG-2000 entropy coder implementation for multimedia embedded systems

The JPEG-2000 standard defines an ISO/IEC standard for the compression of still images. The large variety of features of the standard makes it very attractive, but at the same time much more complex than the usual JPEG standard. Several approaches have been proposed to implement the standard efficiently, but most of them are hardware accelerators. The work presents a system on a programmable chip implementation which makes best use of both hardware capabilities and software performance on a Xilinx VirtexII-Pro platform.